A TSV is a vertical electrical connection passing completely through a silicon wafer or die. TSV technology is important in creating 3D packages and 3D integrated circuits (IC). It provides interconnection of vertically aligned electronic devices through internal wiring that significantly reduces complexity and overall dimensions of a multi-chip electronic circuit.
A typical TSV process involves forming TSV holes and depositing conformal diffusion barrier and conductive seed layers, followed by filling of TSV holes with a metal. Copper is typically used as the conductive metal in TSV fill as it supports high current densities experienced at complex integration, such as 3D packages and 3D integrated circuits, and increased device speed. Furthermore, copper has good thermal conductivity and is available in a highly pure state.
TSV holes typically have high aspect ratios which makes void-free deposition of copper into such structures a challenging task. CVD deposition of copper requires complex and expensive precursors, while PVD deposition often results in voids and limited step coverage. Electroplating is a more common method of depositing copper into TSV structures; however, electroplating also presents a set of challenges because of the TSV's large size and high aspect ratio.
In a typical TSV electrofilling process, the substrate is negatively electrically biased and is contacted with a plating solution which includes copper sulfate as a source of copper ions, sulfuric acid for controlling conductivity, chloride ion and several organic additives known as suppressors, accelerators and levelers. However, the use of standard electrolytes and additives often results in very slow plating and in formation of voids during TSV filling. Further, filling of TSVs is usually accompanied by deposition of substantial amounts of copper in the field region, which later needs to be removed by chemical mechanical polishing (CMP) or other planarization methods. Further, conformal filling which includes deposition of substantial amounts of copper on the TSV sidewalls, can result in seam voids.
Several approaches have been proposed for bottom-up (rather than conformal) filling of TSVs. U.S. Pat. No. 7,670,950 issued to Richardson et al., describes filling TSVs using an electrolyte, which includes a polymeric organic additive (e.g., a vinyl pyridine based polymer) which promotes faster copper deposition at the via bottom than at the via opening. Richardson describes depositing copper onto TSV substrate while controlling current density applied to the substrate and achieves filling times of about 110 minutes for filling 90-micron deep TSVs.
Another approach is described in an article titled “High Speed Through Silicon Via Filling by Copper Electrodeposition” (Electrochemical and Solid-State Letters, 13(5) D26-D28 (2010)) by Kondo et al., where TSV filling includes two components: (a) printing of copper deposition inhibitor (octadecanthiol) on top surface of the substrate prior to deposition to inhibit deposition of copper in the field, and (b) adding a polymeric organic additive (sulfonated diallyl dimethyl ammonium chloride copolymer) to the plating bath. Electroplating also involved purging the plating bath with oxygen before each electrodeposition to enrich the plating solution with oxygen. Filling time of 37 minutes was achieved for a 70-micron deep TSV with this method. However, this method requires two distinct steps which employ different chemical compounds, and is, therefore, costly. Additionally, in a two step process, the additional variable of residence time of the substrate between these processes, can cause additional variability in the product, which is undesirable.
While these methods address some of the problems associated with TSV filling, both faster filling methods, and methods with more robust control over the quality of the filling process, are desired.